Sidense to Present at Silicon Valley Flash Memory Summit

OTTAWA and SANTA CLARA, CA--(Marketwire - August 7, 2009) -

What Jim Lipman, Marketing Director at Sidense, will make a presentation on: "A Novel Embedded OTP Memory Bit Cell Based on Oxide Breakdown." The talk will describe an antifuse-based split-channel OTP bit-cell architecture based on predictable and irreversible thin-oxide breakdown. The bit cell is at the heart of a field-programmable, very small, highly secure, and very reliable embedded memory that does not require any additional masks or process steps when implemented in a standard-logic CMOS process. The bit cell is scalable down to 40nm and below. Where Flash Memory Summit (www.flashmemorysummit.com) Santa Clara Convention Center Santa Clara, CA When Thursday, August 13, 2009 8:30-9:40 AM In the session on "Life Beyond Flash: New Non-Volatile Memory Technologies" Who Jim Lipman, Director of Marketing

About Sidense

Sidense Corp., the only logic non-volatile memory provider listed on EE Times 60 Emerging Startups list for 2009, provides secure, dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes, with no additional masks or process steps required. Sidense's patented one-transistor 1T-FuseT architecture (U.S. Patent #7402855 and others) provides the industry's smallest footprint, most reliable and lowest power Logic Non-Volatile Memory IP solution and offers an alternative solution to Flash, mask ROM and eFuse in many applications.

Sidense OTP memory is available at 180nm, 130nm, 110nm, 90nm, 65nm, and 55nm and is scalable to 40nm and below. The IP is available at all top-tier semiconductor foundries. Customers are using Sidense OTP for analog trimming, code storage, encryption keys such as HDCP, RFID and Chip ID, medical, automotive, and configurable processors and logic. For more information, please visit www.sidense.com.