Nano Labs Debuts FPU3.0 With 5X Power Efficiency Boost: Details

Nano Labs Ltd NA shares are trading lower on Thursday. Today, the company unveiled FPU3.0, its latest ASIC architecture aimed at enhancing AI inference and blockchain performance.

The FPU series is Nano Labs’ proprietary ASIC chip architecture tailored for high-bandwidth High Throughput Computing applications.

FPU3.0, utilizing advanced 3D DRAM stacking, achieves a fivefold increase in power efficiency compared to its predecessor, FPU2.0, setting a benchmark for energy-efficient, high-performance ASICs.

The FPU3.0 architecture features stacked 3D memory with a theoretical bandwidth of 24TB/s and an enhanced Smart-NOC on-chip network.

This modular design allows for rapid product updates by modifying the FPU core IP while reusing or upgrading other components, enabling the seamless introduction of new features.

This network accommodates diverse compute cores and traffic types, including large and small cores, full-crossbar, and feed-through traffic.

The Nano FPU architecture consists of four key components: the Smart Network-on-Chip, a high-bandwidth memory controller, chip-to-chip interconnect IOs, and the FPU core.

These chips deliver superior computational efficiency and lower power consumption compared to general-purpose CPUs and GP-GPUs, making them ideal for AI inference, edge AI computing, 5G data transmission processing, and network acceleration.

Price Action: NA shares are down 15.8% at $7.57 at the last check Thursday.

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