Marvell's Latest Data Infrastructure Offerings: Everything You Need To Know

Marvell Technology Inc MRVL unveiled a new advanced silicon platform based on Taiwan Semiconductor Manufacturing Co Ltd's TSM 3nm process technology. Marvell will have IP cores on upcoming TSMC 3nm silicon releases.
Marvell introduces a standards-based silicon platform for multi-chip solutions that leverages the latest process technology, advanced die-to-die interface IP, and TSMC's advanced 2.5D Chip-on-Wafer-on-Substrate (CoWoS) packaging technology.
The new 3nm multi-chip platform includes two complementary advanced die-to-die interfaces. The first is a flexible extra short reach (XSR) interface connecting multiple die on a package substrate for applications, like co-packaged optics (CPO) for cloud data centers.
Marvell is also developing an ultra-low-power and low-latency parallel die-to-die interface with the highest bandwidth density in the industry.
Additionally, Marvel expanded the 5nm data infrastructure platform with the 5nm 50G PAM4 device for the carrier market, the Prestera DX 7321 Ethernet switch.
The Marvell Prestera switch and OCTEON DPU deliver 50% lower power than existing offerings, enabling new infrastructure solutions for next-generation carrier edge networks and RAN deployment models.
Price Action: MRVL shares traded higher by 4.12% at $59.96 on the last check Tuesday.