According to Anirudh Devgan, CEO of Cadence Design Systems Inc CDNS, semiconductor packaging is the key to U.S. leadership in emerging technologies like artificial intelligence.
While sophisticated chip packaging has helped companies like Nvidia Corp NVDA develop AI accelerators, a limited number of suppliers are now causing bottlenecks.
As computational demands increase and advanced chips become more expensive due to smaller transistors, working with three-dimensional structures and overcoming physical limitations is essential, Bloomberg reports.
Taiwan Semiconductor Manufacturing Company Ltd TSM leads in advanced chip packaging patents, followed by Samsung Electronics Co, Ltd SSNLF and Intel Corp INTC. TSMC had shared plans to double its advanced chip packaging capacity.
Stacking chiplets into multifunctional 3D chips is one way silicon designers are advancing their capabilities, especially as the pursuit of smaller transistors nears the limits of physics.
This approach enables the creation of powerful chips capable of handling tasks like generative AI at a reasonable cost.
Devgan emphasized the importance of securing a lead in 3D-IC packaging for the U.S., pitching for assembling chips from different fabs.
The Nvidia case illustrates this challenge, as the company possesses a technological edge but faces supply constraints due to limited capacity from TSMC, its chosen chipmaker for advanced AI components.
TSMC's Chairman, Mark Liu, recently stated that the semiconductor shortage will likely persist for another 18 months. Devgan believes it's beneficial for the U.S. government to invest in such technology.
Cadence is exploring the possibility of applying for funding from the $52 billion Chips and Science Act, passed last year to bring more of the global semiconductor supply chain within U.S. borders.
Disclaimer: This content was partially produced with the help of AI tools and was reviewed and published by Benzinga editors.
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